1. Field of the Invention
This invention relates to semiconductor integrated circuit structures and, more specifically, to structures formed on semiconductor devices, both active and passive, which are disposed on the surface of the substrate as well as in grooves having a component normal to the substrate and within the substrate itself.
2. Brief Description of the Prior Art
In the prior art, semiconductor devices such as transistors, integrated circuits and the like are generally formed utilizing a single top surface of the semiconductor substrate for formation of both active and passive components such as metal leads, resistors, capacitors and the like. In fact, the amount of the semiconductor material presently used, to perform semiconductor functions, in the two dimensional structure approaches amounts to a very small percentage of the total semiconductor substrate available. In addition, in the present state of the art, non-semiconductor components such as the metal leads, resistors, capacitors and the like occupy approximately 60% of the semiconductor chip surface area utilized. It is therefore readily apparent that semiconductor substrates as produced in accordance with the prior art and the present state of the art are highly inefficient in their use of the available substrate volume.
It is also known in the art that high component packing densities are very advantageous and the art is continually striving to increase the component packing density. However, it is clear that, as component packing densities increase, inprovements thereof may ultimately show a rate decline due to possible physical phenomenon limitations or the like. It is therefore readily apparent from the above that, if major gains in component packing density are to continue to be achieved, such major gains must result from procedures and approaches other than those utilized in the present state of the art for increasing component packing density.